GByte-class skewless parallel-optical-data-link subsystem

Author

Yoshikawa, T. ; Araki, S. ; Miyoshi, K. ; Henmi, N. ; Suemura, Y. ; Nagahori, T. ; Matsuoka, H.

Author_Institution

Optoelectron.-NEC Lab., Real World Comput. Partnership, Kanagawa, Japan

Volume

2

fYear

1996

fDate

18-21 Nov. 1996

Firstpage

63

Abstract

This paper describes 48 x 100 Mbit/s data link subsystem using a 6 x 1.1 Gbit/s arrayed optical transceiver module and 15-ns deskew function ICs. This link will be applied to the real world computing (RWC)-1, which is one of the massively parallel computer with 1,000-class processor elements.

Keywords

integrated optoelectronics; multiprocessor interconnection networks; optical fibre LAN; optical interconnections; optical receivers; optical transmitters; parallel architectures; transceivers; 100 Mbit/s; 4800 Mbit/s; GByte-class skewless parallel-optical-data-link subsystem; Mbit/s data link subsystem; arrayed optical transceiver module; deskew function ICs; massively parallel computer; optical transceivers; processor elements; real world computing; Bit error rate; Clocks; Concurrent computing; Laboratories; Master-slave; National electric code; Optical arrays; Optical interconnections; Optical receivers; Optical transmitters;

fLanguage

English

Publisher

ieee

Conference_Titel

Lasers and Electro-Optics Society Annual Meeting, 1996. LEOS 96., IEEE

Conference_Location

Boston, MA, USA

Print_ISBN

0-7803-3160-5

Type

conf

DOI

10.1109/LEOS.1996.571550

Filename

571550