DocumentCode
2541974
Title
Reverse conversion architectures for signed-digit residue number systems
Author
Persson, Andreas ; Bengtsson, Lars
Author_Institution
Dept. of Comput. Sci. & Eng., Chalmers Univ. of Technol., Gothenburg
fYear
2006
fDate
21-24 May 2006
Abstract
This paper presents circuits for conversion from radix-2 signed-digit residue numbers to binary form. Four reverse converters for combined RNS/SD number systems based on different moduli sets are presented. Implementations are compared with respect to timing, area and area-delay products. Finite impulse response (FIR) filters are used as reference designs in order to evaluate the performance of RNS/SD processing in a typical DSP block using the suggested moduli sets
Keywords
FIR filters; digital signal processing chips; residue number systems; DSP block; FIR filters; RNS/SD number systems; RNS/SD processing; finite impulse response filters; moduli sets; reverse conversion architectures; reverse converters; signed-digit residue number systems; Arithmetic; Circuits; Computer architecture; Computer science; Concurrent computing; Digital signal processing; Dynamic range; Finite impulse response filter; High performance computing; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location
Island of Kos
Print_ISBN
0-7803-9389-9
Type
conf
DOI
10.1109/ISCAS.2006.1693181
Filename
1693181
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