DocumentCode :
254219
Title :
Optimized design of A Parking Management System Using FPGA
Author :
Umar, W. ; Alam, F. ; Usman Ali Shah, S.M.
Author_Institution :
Electron. (MSD) Eng., NED Univ. of Eng. & Technol., Karachi, Pakistan
fYear :
2014
fDate :
18-20 Dec. 2014
Firstpage :
192
Lastpage :
196
Abstract :
The work presented in this paper gives more insight and deeper understanding of constituting modules of parking system. This paper investigates the optimized parking system through FPGA employing “logic for gathers” including multiple registers as their logic block. And we show that this algorithm is superior to an existing packing algorithm.
Keywords :
field programmable gate arrays; formal logic; traffic engineering computing; FPGA; logic block; optimized design; optimized parking management system; packing algorithm; Clocks; Crystals; DC motors; Field programmable gate arrays; Radiofrequency identification; Real-time systems; Silicon; FSM; Vehicle Parking Lots; Xilinx FPGA;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Open Source Systems and Technologies (ICOSST), 2014 International Conference on
Conference_Location :
Lahore
Print_ISBN :
978-1-4799-2053-2
Type :
conf
DOI :
10.1109/ICOSST.2014.7029343
Filename :
7029343
Link To Document :
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