Integration and bit distribution of production-worthy FRAM embedded with 130nm CMOS logic

Author

Udayakumar, K.R. ; Boku, K. ; Remack, K.A. ; Rodriguez, J. ; Aggarwal, S. ; Celii, F.G. ; Martin, J.S. ; Matz, L. ; Summerfelt, S.R. ; Moi, T.S.

Author_Institution

Silicon Technol. Dev., Texas Instruments Inc., Dallas, TX

fYear

2005

fDate

10-10 Nov. 2005

Lastpage

44

Abstract

High density embedded FRAM has been fabricated within a 130nm, 5LM Cu/FSG CMOS logic process with only two additional masks. Integrated arrays, fabricated with 70nm-thick MOCVD lead zirconate titanate (PZT) as the ferroelectric and Ir/IrO₂ electrodes, show good separation voltage and wide signal margin between the two data states. Ferroelectric processing does not adversely affect the CMOS properties. Opposite state retention measurements of the arrays project greater than 10 years lifetime at 85degC

Keywords

CMOS memory circuits; MOCVD; ferroelectric storage; iridium compounds; lead compounds; random-access storage; zirconium compounds; 130 nm; 70 nm; 85 C; CMOS logic; Ir-IrO₂; MOCVD; bit distribution; embedded FRAM; ferroelectric processing; lead zirconate titanate; state retention measurements; CMOS logic circuits; CMOS process; Electrodes; Ferroelectric films; Ferroelectric materials; MOCVD; Nonvolatile memory; Random access memory; Titanium compounds; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Non-Volatile Memory Technology Symposium, 2005

Conference_Location

Dallas, TX

Print_ISBN

0-7803-9408-9

Type

conf

DOI

10.1109/NVMT.2005.1541391

Filename

1541391