DocumentCode
2543259
Title
Integration of a plasma doping PULSION® process into a fully depleted SOI transistor flow chart
Author
Duchaine, Julian ; Gonzatti, Frederic ; Torregrosa, Frank ; Etienne, Hasnaa ; Felch, Susan ; Milési, Frederic ; Yckache, Karim ; Spiegel, Yohann ; Claverie, Alain
Author_Institution
Ion Beam Services, ZI Peynier Rousset, Peynier, France
fYear
2011
fDate
9-10 June 2011
Firstpage
67
Lastpage
70
Abstract
In this paper we discuss the integration of plasma doping into a Fully Depleted SOI CMOS process flow (sub-10 nm top Si layer). The compatibility of PD with patterns (charging effects) has been studied as well as the Selective Epitaxial Growth (SEG) performed after the source/drain extension implantations to thicken these regions prior to silicidation.
Keywords
CMOS integrated circuits; epitaxial growth; ion implantation; silicon-on-insulator; CMOS process flow; charging effects; fully depleted SOI transistor flow chart; plasma doping process; selective epitaxial growth; Doping; Implants; Ion implantation; Plasmas; Resists; Scanning electron microscopy; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Junction Technology (IWJT), 2011 11th International Workshop on
Conference_Location
Kyoto
Print_ISBN
978-1-61284-131-1
Type
conf
DOI
10.1109/IWJT.2011.5970001
Filename
5970001
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