A hardware efficient 3-bit second-order dynamic element matching circuit clocked at 300MHz

A robust and hardware efficient dynamic element matching (DEM) algorithm is developed and used to design a 4^th-order bandpass (BP) mismatch-shaping circuit, moved inside the feedback loop of a 6^th-order bandpass continuous-time delta-sigma modulator. This algorithm is based on a shortened tree-structured scheme (STDEM) which can assure a stable high order mismatch-shaping with a modest circuit volume. The modulator has a 3-bit quantizer and 8 thermometric feedback DAC´s cells. The designed DEM´s circuits is simulated in 0.35mum-CMOS which can be clocked up to 300-MHz. The mismatch error floor is decreased of about 35dB in the band of interest. Its related circuit occupies of about 0.22mm² area