Title :
A linear algorithm for floorplan compaction
Author :
Wasi-ur-Rahman, Md ; Islam, Nusrat Sharmin ; Rahman, Md Saidur
Author_Institution :
Dept. of Comput. Sci. & Eng., Bangladesh Univ. of Eng. & Technol., Dhaka
Abstract :
A sequence pair is a pair of sequences of n rectangular blocks which represents the relative positions of each of these blocks in a floorplan. In this paper, we present an O(n) time algorithm for constructing a compact floorplan from a given sequence pair representation. The best known previous algorithm takes O(nloglogn) time.
Keywords :
VLSI; circuit layout CAD; computational complexity; integrated circuit layout; floorplan compaction; linear algorithm; rectangular blocks; sequence pair; time complexity; Chip scale packaging; Circuits; Compaction; Computer science; Costs; DH-HEMTs; Sorting; Very large scale integration;
Conference_Titel :
Electrical and Computer Engineering, 2008. ICECE 2008. International Conference on
Conference_Location :
Dhaka
Print_ISBN :
978-1-4244-2014-8
Electronic_ISBN :
978-1-4244-2015-5
DOI :
10.1109/ICECE.2008.4769352
