DocumentCode :
2543950
Title :
Software Performance Estimation in MPSoC Design
Author :
Oyamada, Marcio ; Wagner, Flávio R. ; Bonaciu, Marius ; Cesario, Wander ; Jerraya, Ahmed
Author_Institution :
UFRGS, Inst. de Informatica, Porto Alegre
fYear :
2007
fDate :
23-26 Jan. 2007
Firstpage :
38
Lastpage :
43
Abstract :
Estimation tools are a key component of system-level methodologies, enabling a fast design space exploration. Estimation of software performance is essential in current software-dominated embedded systems. This work proposes an integrated methodology for system design and performance analysis. An analytic approach based on neural networks is used for high-level software performance estimation. At the functional level, this analytic tool enables a fast evaluation of the performance to be obtained with selected processors, which is an essential task for the definition of a "golden" architecture. From this architectural definition, a tool that refines hardware and software interfaces produces a bus-functional model. A virtual prototype is then generated from the bus-functional model, providing a global, cycle-accurate simulation model and offering several features for design validation and detailed performance analysis. Our work thus combines an analytic approach at functional level and a simulation-based approach at bus functional level. This provides an adequate trade-off between estimation time and precision. A multiprocessor platform implementing an MPEG4 encoder is used as case study, and the analytic estimation results in errors only up to 17% when compared to the virtual platform simulation. On the other hand, the analytic estimation takes only 17 seconds, against 10 minutes using the cycle-accurate simulation model.
Keywords :
circuit CAD; coprocessors; formal verification; image coding; integrated software; multiprocessing systems; neural nets; software performance evaluation; system-on-chip; MPEG4 encoder; MPSoC design; bus-functional model; cycle-accurate simulation model; design space exploration; design validation; integrated methodology; multiprocessor platform; neural networks; performance analysis; software performance estimation; software-dominated embedded systems; Analytical models; Computer architecture; Embedded system; Hardware; Neural networks; Performance analysis; Refining; Software performance; Space exploration; System analysis and design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2007. ASP-DAC '07. Asia and South Pacific
Conference_Location :
Yokohama
Print_ISBN :
1-4244-0629-3
Electronic_ISBN :
1-4244-0630-7
Type :
conf
DOI :
10.1109/ASPDAC.2007.357789
Filename :
4195993
Link To Document :
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