Author :
Kleveland, Bendik ; Miller, Michael J. ; David, Ronald B. ; Patel, Jatin ; Chopra, R. ; Sikdar, Dipak K. ; Kumala, Jeff ; Vamvakos, Socrates D. ; Morrison, Matthew ; Liu, Minggang ; Balachandran, Jayaprakash
Abstract :
Memory access rate is a primary performance bottleneck in high-performance networking systems. The MoSys Bandwidth Engine family of integrated circuits provides a significant improvement in effective memory performance by using high-speed serial I/O´s, many banks of memory, a low-latency, highly efficient protocol, and intelligence within the device. The first member of the family can perform 2 billion 72-bit reads per second or 1 billion read-modify-write operations per second.
Keywords :
performance evaluation; protocols; random-access storage; MOSYS bandwidth engine family; high-performance networking systems; high-speed serial I-O; integrated circuits; intelligent RAM; many memory banks; memory access rate; memory performance; read-modify-write operations; Bandwidth; Memory management; Performance evaluation; Random access memory; Synchronization; integrated circuits; interfaces; memory technologies; multiple data stream architectures; semiconductor memories;
