DocumentCode :
2544021
Title :
Extracting simple but accurate RC models for VLSI interconnect
Author :
van Genderen, A.J. ; Van Der Meijs, N.P.
Author_Institution :
Dept. of Electr. Eng., Delft Univ. of Technol., Netherlands
fYear :
1988
fDate :
7-9 June 1988
Firstpage :
2351
Abstract :
The authors describe a method to find RC models for (nonorthogonal) interconnections in VLSI layouts, including resistances as well as ground and coupling capacitances. The method starts with the construction of a finite-element mesh for the interconnection polygons. Resistances are assigned to the edges of the mesh, and capacitances to the vertices. Then, all internal nodes are eliminated by a novel and efficient node-reduction algorithm. This algorithm preserves the Elmore time constants between the remaining nodes, without actually computing them. The resulting network accurately reflects the electrical properties of the distributed RC interconnections, and can efficiently be simulated.<>
Keywords :
VLSI; circuit analysis computing; metallisation; Elmore time constants; VLSI interconnect; accurate RC models; coupling capacitances; distributed RC interconnections; electrical properties; finite-element mesh; ground capacitances; interconnection polygons; metallisation; node-reduction algorithm; nonorthogonal interconnections; resistances; simplified model; Circuit simulation; Computational modeling; Conducting materials; Contracts; Finite element methods; Integrated circuit interconnections; Parasitic capacitance; Transfer functions; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1988., IEEE International Symposium on
Conference_Location :
Espoo, Finland
Type :
conf
DOI :
10.1109/ISCAS.1988.15415
Filename :
15415
Link To Document :
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