DocumentCode :
254403
Title :
A fully integrated 166-GHz frequency synthesizer in 0.13-μm SiGe BiCMOS for D-band applications
Author :
Jin He ; Yong-Zhong Xiong ; JianKang Li ; Debin Hou ; Sanming Hu ; Dan Lei Yan ; Arasu, M.A. ; Yue Ping Zhang
Author_Institution :
Wuhan Univ., Wuhan, China
fYear :
2014
fDate :
10-12 Dec. 2014
Firstpage :
156
Lastpage :
159
Abstract :
This paper presents a fully integrated 166-GHz frequency synthesizer (FS) in 0.13-μm SiGe BiCMOS technology. The proposed FS consists of a 20-GHz phase-locked loop (PLL) and a frequency multiplier including a doubler (×2) and a quadrupler (×4). The FS generates the D-band output signals from 164.08 to 166.19 GHz. At 166.19 GHz, the measured phase noises at 100-kHz and 1-MHz offset frequencies are -54.07 dBc/Hz and -72.29 dBc/Hz, respectively. The total dc power dissipation of the FS is around 110 mW and the chip area is 2.16 × 0.57 mm2 including all testing pads. To the best of authors´ knowledge, the proposed FS achieves the lowest power dissipation above 100 GHz to date and has great potential to be used for high-integration D-band applications.
Keywords :
BiCMOS integrated circuits; field effect MIMIC; frequency multipliers; frequency synthesizers; low-power electronics; phase locked loops; phase noise; SiGe BiCMOS; frequency 166 GHz; frequency 20 GHz; frequency multiplier; fully integrated frequency synthesizer; high-integration D-band applications; phase noises; phase-locked loop; size 0.13 mum; total dc power dissipation; Abstracts; Decision support systems; Indexes; Phase locked loops; Radiofrequency integrated circuits; Solid state circuits; D band; Frequency synthesizer; SiGe BiCMOS; phase-locked loop (PLL); voltage-controlled oscillator (VCO);
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Circuits (ISIC), 2014 14th International Symposium on
Conference_Location :
Singapore
Type :
conf
DOI :
10.1109/ISICIR.2014.7029436
Filename :
7029436
Link To Document :
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