Volume production of unique plastic surface-mount modules for the IBM 80-ns 1-Mbit DRAM chip by area wire bond techniques

Author

Ward, William C.

Author_Institution

IBM Gen. Technol. Div., Essex Junction, VT, USA

fYear

1988

fDate

9-11 May 1988

Firstpage

552

Lastpage

557

Abstract

The implementation of a 26-lead small-outline J-lead (SOJ) integrated-circuit surface-solder plastic package is described. A plastic SOJ package for this chip design which, by conventional wire bond methods, is neither feasible nor manufacturable is used. The packaging method, developed in parallel with device design, takes advantage of unconventional chip input/output (I/O) pad placement to produce an internal package construction called area-wire-bond (A-wire) which complements mechanical, thermal, and electrical device performance functions. Data gathered during the qualification of the manufacturing lines have shown that A-wire packages consistently exceed established IBM reliability criteria for semiconductor packages

Keywords

integrated memory circuits; lead bonding; modules; random-access storage; surface mount technology; 1 Mbit; 80 ns; A-wire packages; IBM DRAM chip; IBM reliability criteria; area wire bond techniques; chip input/output pad placement; integrated-circuit; packaging method; plastic SOJ package; plastic surface-mount modules; semiconductor packages; small-outline J-lead IC surface solder plastic package; volume production; Bonding; Chip scale packaging; Manufacturing; Plastic packaging; Production; Qualifications; Semiconductor device manufacture; Semiconductor device packaging; Semiconductor device reliability; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics Components Conference, 1988., Proceedings of the 38th

Conference_Location

Los Angeles, CA

Type

conf

DOI

10.1109/ECC.1988.12647

Filename

12647