The increase sensitivity of PNP-magnetotransistor in CMOS technology

Author

Leepattarapongpan, C. ; Phetchakul, T. ; Pengpad, P. ; Srihapat, A. ; Jeamsaksiri, W. ; Chaowicharat, E. ; Hruanun, C. ; Poyai, A.

Author_Institution

Dept. of Electron., King Mongkut´s Inst. of Technol. Ladkrabang, Bangkok, Thailand

fYear

2014

fDate

10-12 Dec. 2014

Firstpage

420

Lastpage

423

Abstract

This paper presents improve sensitivity of pnp-magnetotransistor for detect vertical magnetic field response. The device structure consisted of one emitter, four collectors and four bases. The four collectors are separate to form four terminals. The same is true for the four bases. The experiment showed that, at 2 and 4mA of biasing current, magnetic field in B_Z direction sensitivity within the range of 0-400 mT are 0.045 and 0.09 mV/mT in single mode. The sensitivity of merge mode are 0.15 and 0.3 mV/mT. The magnetic field response of merge mode shows 4-time increase of the magnetic field sensitivity comparative to single mode.

Keywords

CMOS integrated circuits; magnetic fields; power transistors; CMOS technology; PNP-magnetotransistor; magnetic field sensitivity; vertical magnetic field response; CMOS integrated circuits; Magnetic fields; Magnetic flux; Magnetic sensors; Sensitivity; HALL Effect; Lorentz force; Magnetotransistor;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Circuits (ISIC), 2014 14th International Symposium on

Conference_Location

Singapore

Type

conf

DOI

10.1109/ISICIR.2014.7029448

Filename

7029448