DocumentCode :
2544309
Title :
A Highly Integrated 8mW H.264/AVC Main Profile Real-time CIF Video Decoder on a 16MHz SoC Platform
Author :
Peng, Huan-Kai ; Lee, Chun-Hsin ; Chen, Jian Wen ; Lo, Tzu-Jen ; Chang, Yung-Hung ; Hsu, Sheng-Tsung ; Lin, Yuan-Chun ; Chao, Ping ; Hung, Wei-Cheng ; Jan, Kai-Yuan
Author_Institution :
Dept. of Comput. Sci., Nat. Tsing Hua Univ., Hsinchu
fYear :
2007
fDate :
23-26 Jan. 2007
Firstpage :
112
Lastpage :
113
Abstract :
We present a hardwired decoder prototype for H.264/AVC main profile video. Our design takes as its input compressed H.264/AVC bit-stream and produces as its output video frames ready for display. We wrap the decoder core with an AMBA-AHB bus interface and integrate it into a multimedia SoC platform. Several architectural innovations at both IP and system levels are proposed to achieve very high performance at very low operating frequency. Running at 16MHz, our FPGA demo system is able to real-time decode CIF (352 times 288) video at 30 frames per second. Moreover, we take system cost into consideration such that only a single external SDRAM is needed and memory traffic minimized.
Keywords :
field programmable gate arrays; multimedia systems; system-on-chip; video coding; 16 MHz; 8 mW; AMBA-AHB bus interface; FPGA; H.264 AVC; architectural innovations; compressed bit-stream; external SDRAM; hardwired decoder; memory traffic minimization; multimedia SoC platform; real-time CIF video decoder; Automatic voltage control; Costs; Decoding; Displays; Field programmable gate arrays; Frequency; Prototypes; Real time systems; Technological innovation; Video compression;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2007. ASP-DAC '07. Asia and South Pacific
Conference_Location :
Yokohama
Print_ISBN :
1-4244-0629-3
Electronic_ISBN :
1-4244-0630-7
Type :
conf
DOI :
10.1109/ASPDAC.2007.357966
Filename :
4196012
Link To Document :
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