DocumentCode :
254446
Title :
Digital compensation method for the path delay mismatches in GRO-TDC
Author :
Pyoungwon Park ; Nag, D. ; Yan Dan Lei ; Arasu, M.A.
Author_Institution :
Inst. of Microelectron., Agency for Sci., Technol. & Res., Singapore, Singapore
fYear :
2014
fDate :
10-12 Dec. 2014
Firstpage :
75
Lastpage :
78
Abstract :
The digital compensation method for path delay mismatches in time-to-digital converter (TDC) based on gated-ring oscillator (GRO) is proposed and demonstrated. The output of the GRO is digitized by the combination of a counter and a phase-to-digital converter producing an integer and a fractional digital value, respectively. Due to the delay mismatches between two paths, the integer and fractional digital values are not synchronized thereby causing calculation errors. In order to reduce the errors, a correction bit is generated and then the erroneous output is fixed based on the correction bit by the additional but simple digital circuits. Measurement results show that many calculation errors are corrected by the proposed compensation method reducing the quantization noise power by 10dB at high frequency offset.
Keywords :
delays; error compensation; oscillators; time-digital conversion; GRO-TDC; correction bit; counter; digital circuits; digital compensation method; fractional digital value; gated-ring oscillator; high frequency offset; integer; path delay mismatches; phase-to-digital converter; quantization noise power; time-to-digital converter; Delays; Measurement units; Noise; Noise shaping; Quantization (signal); Radiation detectors; gated-ring oscillator (GRO); mismatch compensation; time-to-digital converter;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Circuits (ISIC), 2014 14th International Symposium on
Conference_Location :
Singapore
Type :
conf
DOI :
10.1109/ISICIR.2014.7029455
Filename :
7029455
Link To Document :
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