DocumentCode
254452
Title
Design of threshold dominant delay Physical Unclonable Functions in 65nm CMOS
Author
Yuejun Zhang ; Pengjun Wang ; Jianrui Li ; Gang Li
Author_Institution
Institude of Circuits & Syst., Ningbo Univ., Ningbo, China
fYear
2014
fDate
10-12 Dec. 2014
Firstpage
324
Lastpage
327
Abstract
Physical Unclonable Functions (PUFs) exploits static process variation across integrated circuits in the manufacturing processes to generate many unique, random and unclonable security keys. In this paper, a threshold dominant delay PUFs (TDD-PUFs) is designed in TSMC 65nm CMOS technology. After configuring the nMOSFET and pMOSFET dominant delay, TDD-PUFs updates the key without physically replace. N stages threshold dominant delay cell, arbiter and other circuits are organized to realize TDD-PUFs. In custom designed, the layout of 128-bit TDD-PUFs occupies 358.62μm×154.65μm. Experimental results show that the randomness is about 100% over a range of environmental variations.
Keywords
CMOS integrated circuits; MOSFET; integrated circuit design; CMOS technology; nMOSFET; pMOSFET; static process variation; threshold dominant delay physical unclonable functions; CMOS integrated circuits; Delays; Integrated circuit modeling; Inverters; Layout; MOSFET circuits; Security; 65nm; TDD-PUFs; delay circuit; information security; threshold variation;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Circuits (ISIC), 2014 14th International Symposium on
Conference_Location
Singapore
Type
conf
DOI
10.1109/ISICIR.2014.7029458
Filename
7029458
Link To Document