Title :
A modeling platform for efficient characterization of phase-locked loop /spl Delta/-/spl Sigma/ frequency synthesizers
Author :
Bourdi, Taoufik ; Borjak, Assaad ; Kale, Izzet
Author_Institution :
Beceem Commun. Inc., Santa Clara, CA
Abstract :
To dramatically reduce the need for silicon reproduction due to poor noise performance, a close-loop simulation platform that combines both measured and/or simulation results of open-loop PLL sub-blocks has been developed. The platform is suited for Delta-Sigma based fractional-N frequency synthesizers enabling integrated circuit designers to directly meet cost, performance and schedule milestones. Case studies employing the developed platform are provided for a fractional-N frequency synthesizer operating near 5 GHz. The effects of dead-zone, dithering, near-integer divisor operation, noise folding and prescaler usage on the overall phase noise performance of the entire frequency synthesizer are detailed
Keywords :
delta-sigma modulation; digital phase locked loops; frequency synthesizers; integrated circuit design; Delta-Sigma frequency synthesizers; close-loop simulation platform; near-integer divisor operation; noise folding; open-loop PLL sub-blocks; phase noise; phase-locked loop; prescaler usage; Circuit simulation; Frequency synthesizers; Integrated circuit measurements; Integrated circuit noise; Integrated circuit synthesis; Noise measurement; Noise reduction; Phase locked loops; Phase noise; Silicon; Δ-Σ; Charge Pump; Divider; Fractional-N; PFD; PLL; Prescaler; Synthesizer; VCO;
Conference_Titel :
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location :
Island of Kos
Print_ISBN :
0-7803-9389-9
DOI :
10.1109/ISCAS.2006.1693311
