ASIC implementation of the cross frequency coupling algorithm for EEG signal processing

In this paper we present an ASIC implementation of the cross frequency coupling (CFC) algorithm that calculates the modulation index directly from digitized electroencephalograph (EEG) signals. To our knowledge this is the first implementation of the CFC algorithm in hardware. The advantage of directly computing the modulation index on chip is that the raw EEG data does not have to be stored in memory and the mobility of the device will allow for more modulation index data to be recorded. The chip is designed on IBM 0.18 micron process. The chip size is 3mm × 3mm with 191mW power consumption.