DocumentCode :
254490
Title :
A 400MHz low power fractional-N synthesizer with GFSK/GMSK modulation in 0.13μm CMOS
Author :
Dan Lei Yan ; Zhao Bin ; Tamura, A. ; Raja, M.K.
Author_Institution :
Inst. of Microelectron., A*STAR (Agency for Sci., Technol. & Res.), Singapore, Singapore
fYear :
2014
fDate :
10-12 Dec. 2014
Firstpage :
556
Lastpage :
559
Abstract :
This paper presents a fully integrated low power, low noise 400MHz fractional-N with direct modulation using 0.13μm CMOS process. The synthesizer provide low phase-noise, covering 410MHz to 490MHz using multiband low gain VCO, Direct modulation that supports three data rate viz, 4.8Kbps, 2.4Kbps and 1.2Kbps GFSK and GMSK. The measurement result show the phase-noise of is -101dBc/Hz at 10KHz offset and -126dBc/Hz at 1MHz offset at 420MHz. The active die area is 0.55mm × 0.8mm. The chip operates over a wide range of supply voltage from 1.2 to 1.5V and temperature from -40°C to +85°C respectively. The chip draws 3.95mA current with divide by 2 and buffer from a +1.2V supply at +25oC.
Keywords :
CMOS integrated circuits; UHF integrated circuits; UHF oscillators; frequency shift keying; frequency synthesizers; low-power electronics; minimum shift keying; phase noise; voltage-controlled oscillators; CMOS process; GFSK-GMSK modulation; bit rate 1.2 kbit/s; bit rate 2.4 kbit/s; bit rate 4.8 kbit/s; current 3.95 mA; direct modulation; frequency 400 MHz to 490 MHz; low phase-noise; low power low noise fractional-N synthesizer; multiband low gain VCO; size 0.13 mum; temperature -40 degC to 85 degC; voltage 1.2 V to 1.5 V; Modulation; Phase frequency detector; Phase locked loops; Phase noise; Synthesizers; Voltage-controlled oscillators; 400MHz; CMOS; PLL; Phase Noise;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Circuits (ISIC), 2014 14th International Symposium on
Conference_Location :
Singapore
Type :
conf
DOI :
10.1109/ISICIR.2014.7029475
Filename :
7029475
Link To Document :
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