DocumentCode
2544992
Title
A termination technique for the averaging network of flash ADC´s
Author
Ismail, Ayman ; Elmasry, M.I.
Author_Institution
Waterloo Univ., Ont.
fYear
2006
fDate
21-24 May 2006
Lastpage
3324
Abstract
In this work, a new termination technique for the averaging network of the flash analog-to-digital converter (ADC) input pre-amplifiers is devised. The proposed technique allows efficient suppression of pre-amplifiers offset voltage while consuming no over-range voltage headroom. This makes it suitable for deep-submicron technologies. This technique is applied to the design of a 2.5GS/S flash ADC in 0.13mum CMOS technology to estimate the resulting saving in the input capacitance and power dissipation of the pre-amplifier array
Keywords
CMOS analogue integrated circuits; analogue-digital conversion; equivalent circuits; preamplifiers; 0.13 micron; CMOS technology; averaging network; capacitance; deep-submicron technologies; flash analog-to-digital converter; power dissipation; pre-amplifier array; pre-amplifiers; termination technique; Analog-digital conversion; CMOS technology; Capacitance; Circuits; Linearity; Resistors; Signal generators; Signal resolution; Very large scale integration; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location
Island of Kos
Print_ISBN
0-7803-9389-9
Type
conf
DOI
10.1109/ISCAS.2006.1693336
Filename
1693336
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