• DocumentCode
    254564
  • Title

    Conversions between RNS and mixed-radix numbers using signed-digit arithmetic

  • Author

    Shugang Wei

  • Author_Institution
    Dept. of Mech. Sci. & Technol., Gunma Univ., Kiryu, Japan
  • fYear
    2014
  • fDate
    10-12 Dec. 2014
  • Firstpage
    600
  • Lastpage
    603
  • Abstract
    By introducing signed-digit (SD) number arithmetic into a residue number system (RNS), arithmetic operations can be performed efficiently. In this paper, hardware algorithms converting the numbers in an RNS with a four-moduli set {2P, 2P-1 - 1, 2P - 1, 2P+1 - 1} to and from that in a mixed-radix number system (MRNS) by using SD arithmetic are proposed. The conversions between the RNS and MRNS numbers can be implemented using the binary tree structure of the fast modulo m SD adders, where m ϵ {2P - 1, 2P±1 - 1}. The modulo m SD addition is implemented simply uisng an end-around-carry SD adder, so that the addition time is independent of the word length of the operands and the conversion time is only dependent of the stages of additions. We also introduce the minimal SD number representation to reduce the stages of the binary addition tree structure. The comparison of the new converters using the SD number arithmetic with that using the binary arithmetic yields reductions in delay of 63% on average.
  • Keywords
    adders; residue number systems; MRNS; RNS; SD number arithmetic; binary arithmetic yields; binary tree structure; end-around-carry SD adder; fast modulo m SD adders; hardware algorithms; mixed-radix number system; residue number system; signed-digit arithmetic; Adders; Binary trees; Bismuth; Computers; Delays; Hardware; Integrated circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Integrated Circuits (ISIC), 2014 14th International Symposium on
  • Conference_Location
    Singapore
  • Type

    conf

  • DOI
    10.1109/ISICIR.2014.7029511
  • Filename
    7029511