• DocumentCode
    2546009
  • Title

    Development of Low-power and Real-time VC-1/H.264/MPEG-4 Video Processing Hardware

  • Author

    Hase, Masaru ; Akie, Kazushi ; Nobori, Masaki ; Matsumoto, Keisuke

  • Author_Institution
    Dept. of Syst. Design 3, Renesas Technol. Corp., Tokyo
  • fYear
    2007
  • fDate
    23-26 Jan. 2007
  • Firstpage
    637
  • Lastpage
    643
  • Abstract
    This paper covers a multi-functional hardware intellectual property (IP) for the encoding and decoding of digital moving pictures with low power consumption. The IP is mainly intended for mobile products such as cellular phones, digital still cameras (DSCs), and digital video cameras (DVCs). It includes VC-1 functionality for Internet content plus AVC (H.264) functionality for digital television broadcasting and MPEG-4 functionality for TV telephony, and is capable of processing D1-sized moving pictures (720 pixels by 480 lines) in real time at an operating frequency of 54 MHz. In addition, original algorithms employed in the IP reduce power consumption by up to 22%.
  • Keywords
    logic design; low-power electronics; real-time systems; video codecs; video coding; 54 MHz; AVC functionality; Internet content; MPEG-4 functionality; TV telephony; VC-1 functionality; decoding; digital moving pictures; digital television broadcasting; encoding; mobile products; multifunctional hardware intellectual property; real-time VC-1/H.264/MPEG-4 video processing hardware; Automatic voltage control; Cellular phones; Decoding; Digital cameras; Encoding; Energy consumption; Hardware; Intellectual property; Internet; MPEG 4 Standard;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2007. ASP-DAC '07. Asia and South Pacific
  • Conference_Location
    Yokohama
  • Print_ISBN
    1-4244-0629-3
  • Electronic_ISBN
    1-4244-0630-7
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2007.358058
  • Filename
    4196104