DocumentCode :
254621
Title :
Side-channel analysis of a high-throughput AES peripheral with countermeasures
Author :
Heinz, B. ; Heyszl, J. ; Stumpf, F.
Author_Institution :
Fraunhofer Res. Instn. for Appl. & Integrated Security (AISEC) Munich, Munich, Germany
fYear :
2014
fDate :
10-12 Dec. 2014
Firstpage :
25
Lastpage :
29
Abstract :
We analyze the side-channel countermeasures implemented in a high-throughput AES peripheral of a commercially available microcontroller which is not dedicated to high security applications. We detect and classify the employed countermeasures and examine their effectiveness against first-order DPA attacks. We practically demonstrate, that all of the implemented countermeasures, which are common time-based hiding countermeasures, can easily be nullified with simple preprocessing methods. This is caused by the inherent properties of high-throughput designs (low number of cycles), which offers few choices for such countermeasures. Hence, we found that the effectively achieved side-channel protection is significantly lower than the theoretically expected one due to the way countermeasures are implemented and present ways to improve the effectiveness. We also reveal a design flaw in the implementation which allows timing-based attacks on the device.
Keywords :
cryptography; data encapsulation; countermeasures classification; countermeasures detection; first order DPA attacks; high-throughput AES peripheral; high-throughput design; preprocessing method; side channel analysis; side channel protection; time-based hiding countermeasure; timing-based attack; Correlation; Delays; Encryption; Engines; Hardware; Registers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Circuits (ISIC), 2014 14th International Symposium on
Conference_Location :
Singapore
Type :
conf
DOI :
10.1109/ISICIR.2014.7029540
Filename :
7029540
Link To Document :
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