VLSI architecture of a high-performance neural spiking activity simulator based on generalized Volterra kernel

It is well known that information is represented and transmitted among neuronal units by a series of all-or-none “neural codes”. In neuroinformatics study, this coding process, also termed as “spiking activity”, is not straightforward for prediction. It is owing to the high nonlinearity and dynamic property involved in generation of the neuronal spikes. In this paper, a novel generalized Volterra kernel-based neural spiking activity simulator is introduced for prediction of the neural codes in mammalian hippocampal region. High-performance VLSI architecture is established for the simulator based on high-order Volterra kernels involving cross terms. The effectiveness and efficiency of the simulator are proven in experimental settings. This simulator has the potential to serve as a core functional unit in future hippocampal cognitive neural prosthesis.