DocumentCode
2546796
Title
Preferable Improvements and Changes to FB-DiMM High-Speed Channel for 9.6Gbps Operation
Author
Hiraishi, Atsushi ; Sugano, Toshio ; Kusamitsu, Hideki
Author_Institution
Technol. & Dev. Office, Elpida Memory Inc., Kanagawa
fYear
2007
fDate
23-26 Jan. 2007
Firstpage
841
Lastpage
845
Abstract
In this paper we showed the signal degradation parts in high-speed channel of FB-DiMM system. And we also showed possible countermeasure. For the verification propose and also for establishing the precise modeling and simulation method, we compared measurement and simulation up to 9.6Gbps operation with test board. And we get good relation between them. After getting the calculated loss budget of estimated system, we made recommendations of preferable changes to main board and DiMM socket.
Keywords
buffer circuits; high-speed integrated circuits; integrated circuit modelling; integrated memory circuits; 9.6 Gbits/s; DiMM socket; fully buffered-DiMM high-speed channel; signal degradation; test board; Connectors; Fingers; Frequency; Impedance; Propagation losses; Random access memory; Scattering parameters; Sockets; Strips; Surface-mount technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2007. ASP-DAC '07. Asia and South Pacific
Conference_Location
Yokohama
Print_ISBN
1-4244-0629-3
Electronic_ISBN
1-4244-0630-7
Type
conf
DOI
10.1109/ASPDAC.2007.358094
Filename
4196140
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