DocumentCode
254683
Title
Twenty years of research on RNS for DSP: Lessons learned and future perspectives
Author
Albicocco, P. ; Cardarilli, G.C. ; Nannarelli, A. ; Re, M.
Author_Institution
Dept. of Electron. Eng., Univ. of Rome “Tor Vergata”, Rome, Italy
fYear
2014
fDate
10-12 Dec. 2014
Firstpage
436
Lastpage
439
Abstract
In this paper, we discuss a number of issues emerged from our twenty-year long experience in applying the Residue Number System (RNS) to DSP systems. In early days, RNS was mainly used to reach the maximum performance in speed. Today, RNS is also used to obtain power-efficient (tradeoffs speed-power) and reliable systems (redundant RNS). Advances in microelectronics and CAD tools play an important role in favoring one technology over another, and a winning choice of the past may become at disadvantage today. In this paper, we address a number of factors influencing the choice of RNS as the winning solution. From technology platforms (ASIC and FPGA), to issue related to modern design tools, from cost of memory, to cost of wiring, from power dissipation to thermal issues. Moreover, we mention how RNS can be helpful in implementing reliable architectures (fault detection and correction) in future VLSI systems.
Keywords
application specific integrated circuits; digital signal processing chips; field programmable gate arrays; integrated circuit reliability; residue number systems; thermal engineering; ASIC; CAD tool; DSP system; FPGA; RNS; VLSI system; cost of memory; cost of wiring; fault correction; fault detection; microelectronics; power dissipation; reliability system; residue number system; thermal system; Delays; Design automation; Digital signal processing; Dynamic range; Field programmable gate arrays; Finite impulse response filters; Power demand;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Circuits (ISIC), 2014 14th International Symposium on
Conference_Location
Singapore
Type
conf
DOI
10.1109/ISICIR.2014.7029575
Filename
7029575
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