Title :
Binary LNS-based naive Bayes hardware classifier for spam control
Author :
Marsono, Muhammad N. ; El-Kharashi, M. Watheq ; Gebali, Fayez
Author_Institution :
Dept. of Electr. & Comput. Eng., Victoria Univ., BC
Abstract :
We propose a hardware architecture for a naive Bayes classifier in the context of e-mail classification for spam control. Our proposal presents a word-serial naive Bayes classifier architecture that utilizes the logarithmic number system (LNS) to reduce the computational complexity. We present the hardware architecture for non-iterative binary LNS recoding using a look-up table approach. Our design was synthesized targeting an Altera Stratix CPLD device. The synthesized classifier was functionally verified with a MATLAB implementation. Our binary LNS naive Bayes classifier exhibits high e-mail classification throughput of more than 30 thousands e-mails per second
Keywords :
Bayes methods; digital arithmetic; pattern classification; programmable logic devices; table lookup; unsolicited e-mail; Altera Stratix CPLD device; binary LNS; complex programmable logic device; e-mail classification; electronic-mail; logarithmic number system; look-up table; spam control; word-serial naive Bayes classifier; Computational complexity; Computer architecture; Electronic mail; Hardware; Internet; MATLAB; Table lookup; Telecommunication traffic; Throughput; Unsolicited electronic mail;
Conference_Titel :
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location :
Island of Kos
Print_ISBN :
0-7803-9389-9
DOI :
10.1109/ISCAS.2006.1693424