Tolerance optimization design for low sidelobe linear arrays

The worst-case tolerance optimization synthesis for low sidelobe linear arrays is studied. The problems are defined mathematically as a fixed tolerance problem (FTP) and a variable tolerance problem (VTP), and new algorithms for solving these problems are proposed. For the solution of the FTP, the regular polyhedron method is used. The VTP is solved by a double-iterative algorithm in which the inner iteration is performed by the FTP algorithm and the outer iteration is implemented by the comparison method. The VTP harmonizes the relation between the array sidelobe level and the tolerances of excitation coefficents, so that the sidelobe level satisfies the desired requirements and the tolerance region is as large as possible. Some numerical results are given.<>