DocumentCode
2547112
Title
Phase noise analysis and design of a 3-GHz bipolar differential colpitts VCO
Author
Wang, Xiaoyan ; Fard, Ali ; Andreani, Pietro
Author_Institution
Infineon Technol. AG, Munich, Germany
fYear
2005
fDate
12-16 Sept. 2005
Firstpage
391
Lastpage
394
Abstract
This paper presents a low-phase-noise differential bipolar Colpitts VCO, implemented in a 0.35μm BiCMOS process. A time-variant phase noise analysis yields closed- form symbolic expressions for the dominant noise sources in the 1/f2 phase-noise region. Measurements show a phase noise of -123 dBc/Hz at 1MHz offset from a 2.8-3.1 GHz carrier, for a figure-of-merit of 183 dBc/Hz. A very good agreement between the derived theoretical formulas, spectreRF simulations, and measurements is observed.
Keywords
BiCMOS integrated circuits; bipolar integrated circuits; integrated circuit noise; microwave oscillators; random noise; voltage-controlled oscillators; 0.35 micron; 1 MHz; 2.8 to 3.1 GHz; BiCMOS process; bipolar differential colpitts VCO; dominant noise sources; phase-noise region; spectreRF simulations; time-variant phase noise analysis; voltage controlled oscillator; Chromium; Inductors; Noise generators; Noise measurement; Phase measurement; Phase noise; Radio frequency; Topology; Voltage; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2005. ESSCIRC 2005. Proceedings of the 31st European
Print_ISBN
0-7803-9205-1
Type
conf
DOI
10.1109/ESSCIR.2005.1541642
Filename
1541642
Link To Document