DocumentCode :
2547227
Title :
On the topographic equivalence between voltage mode and current mode ranked order filters for array processors
Author :
Poikonen, Jonne ; Paasio, Ari
Author_Institution :
Turku Centre for Comput. Sci., TUCS, Turku
fYear :
2006
fDate :
21-24 May 2006
Abstract :
This paper examines the circuit implementation of programmable parallel analog order statistic filtering and compares the topographies of two compact ranked order filter circuit structures, which have been proposed for use in a CNN-type array processor, either for current or voltage mode inputs. The performance and complexity of the circuits is examined with respect to their practical implementability in a massively parallel architecture
Keywords :
analogue processing circuits; current-mode circuits; neural chips; parallel architectures; programmable filters; array processors; circuits complexity; current-mode filters; massively parallel architecture; ranked order filters; statistic filtering; topographic equivalence; voltage-mode filters; Circuits; Computer science; Hardware; Image processing; Information filtering; Information filters; Morphology; Sorting; Statistics; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location :
Island of Kos
Print_ISBN :
0-7803-9389-9
Type :
conf
DOI :
10.1109/ISCAS.2006.1693441
Filename :
1693441
Link To Document :
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