Characterization and analysis of errors in circuit test

Characteristic equations for a general testing model are developed which include the effect of errors in testing. Physical defects are related to logical faults in a circuit and, in contrast to previous works, a requirement that a defect causes at least one fault is modelled. The concept of pseudo-faults is introduced and applied to the general testing model to characterize Type I error which occurs when a good circuit fails the test. Pseudo-faults are seen to affect circuits randomly and occur independently of other defects due to the interaction between the test and the circuit, affecting both defective and good circuits. Data taken from an electronic circuit board assembly and test site is presented in support of the general testing model