1-99% input duty 50% output duty cycle corrector

Author

Huang, Hong-Yi ; Liang, Chia-Ming ; Chiu, Wei-Ming

Author_Institution

Dept. of Electron. Eng., Fu-Jen Catholic Univ.

fYear

2006

fDate

21-24 May 2006

Lastpage

4178

Abstract

This work presents a high bandwidth and wide input duty range duty cycle corrector. A combined charge pump stabilizes the current/sink. A second order differential low-pass filter enhances the stability of the closed loop. A simplified low-voltage amplifier increases the input common-mode range. The accuracy of output duty cycle, the operating frequency range and the stability of the circuit are improved. Using 0.18mum in CMOS process for simulation, the circuit obtains 50% output duty at 800-MHz with 1-99% input duty cycle at a minimum supply voltage of 1.2V. The minimum and maximum operating frequencies are 20-MHz and 2.6-GHz at 1.8V supply voltage, respectively

Keywords

CMOS integrated circuits; circuit stability; low-pass filters; low-power electronics; operational amplifiers; power supply circuits; 0.18 micron; 1.8 V; 2.6 GHz; 20 MHz; CMOS process; charge pump; input common-mode range; input duty cycle corrector; low-voltage amplifier; output duty cycle corrector; second order differential low-pass filter; Bandwidth; Charge pumps; Circuit stability; Clocks; Frequency; Low pass filters; Oscillators; Phase locked loops; Signal generators; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on

Conference_Location

Island of Kos

Print_ISBN

0-7803-9389-9

Type

conf

DOI

10.1109/ISCAS.2006.1693549

Filename

1693549