On-chip current flattening circuit with dynamic voltage scaling

Author

Vahedi, Haleh ; Muresan, Radu ; Gregori, Stefano

Author_Institution

Sch. of Eng., Guelph Univ., Ont.

fYear

2006

fDate

21-24 May 2006

Lastpage

4280

Abstract

This paper presents the circuit-level implementation for a current flattening system designed to control the power-supply current and to protect cryptosystems from power analysis attacks. When required, the proposed circuit dynamically controls the power consumption by injecting an extra current and by scaling the power-supply voltage. The circuit can be integrated on the same chip with a cryptographic processor. In this way the power-supply current has little meaningful information for a side-channel attack. The proposed circuit has been designed in a 0.18 mum CMOS technology and operates with a nominal 1.8-V power supply

Keywords

CMOS integrated circuits; cryptography; integrated circuit design; microprocessor chips; power electronics; 0.18 micron; 1.8 V; CMOS technology; cryptographic processor; cryptosystems; current flattening system; on-chip current flattening circuit; power analysis attacks; power consumption control; power-supply current control; power-supply voltage scaling; side-channel attack; CMOS technology; Circuits; Cryptography; Dynamic voltage scaling; Embedded system; Energy consumption; Power supplies; Power system security; System-on-a-chip; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on

Conference_Location

Island of Kos

Print_ISBN

0-7803-9389-9

Type

conf

DOI

10.1109/ISCAS.2006.1693574

Filename

1693574