DocumentCode :
2549997
Title :
Domain specific reconfigurable fabric targeting Viterbi algorithm
Author :
Zhan, Cheng ; Khawam, Sami ; Arslan, Tughrul
Author_Institution :
Sch. of Electron. & Eng., Edinburgh Univ., UK
fYear :
2004
fDate :
6-8 Dec. 2004
Firstpage :
363
Lastpage :
366
Abstract :
This work presents a novel embedded reconfigurable fabric targeting efficient implementation of the Viterbi decoder within a system-on-chip device. The proposed reconfigurable fabric can support constraint lengths ranging from 3 to 9, and code rates in the range 1/2-1/3.Our results demonstrate that this novel architecture has superior throughput and power consumption characteristics when compared to generic DSPs and FPGAs respectively.
Keywords :
Viterbi decoding; digital signal processing chips; embedded systems; field programmable gate arrays; reconfigurable architectures; system-on-chip; DSP; FPGA; Viterbi algorithm; Viterbi decoder; domain specific reconfigurable fabric targeting; embedded reconfigurable fabric targeting; power consumption; system-on-chip device; Convolution; Decoding; Digital signal processing; Energy consumption; Fabrics; Field programmable gate arrays; Polynomials; System-on-a-chip; Throughput; Viterbi algorithm;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on
Print_ISBN :
0-7803-8651-5
Type :
conf
DOI :
10.1109/FPT.2004.1393300
Filename :
1393300
Link To Document :
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