Cyclic reconfiguration for pipelined applications on coarse-grain reconfigurable circuits

A new reconfiguration technique for pipelined applications on coarse-grain reconfigurable circuits, the cyclic reconfiguration method, is proposed. In this method, the configurations that have interleaved pipeline stages are switched once per clock. This method improves the ratio of effective processing elements in one configuration plane, and the number of switching configuration planes is reduced. As a result, throughput is improved. In comparison with a FIR filter, throughput by the cyclic reconfiguration method is two times the throughput of the previously introduced incremental reconfiguration method.