DocumentCode
2550179
Title
High-performance low-power CMOS circuits using multiple channel length and multiple oxide thickness
Author
Sirisantana, Naran ; Wei, Liqiong ; Roy, Kaushik
Author_Institution
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
fYear
2000
fDate
2000
Firstpage
227
Lastpage
232
Abstract
Power optimization has become an important issue for high performance designs. One way to achieve low-power and high performance circuits is to use dual-threshold voltages. High threshold transistors can be used in non-critical paths to reduce the leakage power, while lower threshold voltage is used for transistors in critical path(s) to achieve high performance. This paper proposes two low power and high performance CMOS design techniques-multiple channel length (MLCMOS) and multiple oxide thickness (MoxCMOS), based on dual Vth, design technique. A comprehensive algorithm for selecting and assigning optimal transistor threshold voltage, channel length and oxide thickness is given. The simulation results on ISCAS benchmark circuits show that the total power consumption can be reduced by 21% for MLCMOS at low activity. Total power savings for MoxCMOS at low and high switching activities are about 42% and 24%, respectively
Keywords
CMOS integrated circuits; circuit simulation; integrated circuit testing; power consumption; ISCAS benchmark circuits; dual-threshold voltages; high-performance low-power CMOS circuits; multiple channel length; multiple oxide thickness; power optimization; simulation results; Algorithm design and analysis; CMOS technology; Circuit simulation; Combinational circuits; Doping; Dynamic voltage scaling; Energy consumption; Propagation delay; Subthreshold current; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design, 2000. Proceedings. 2000 International Conference on
Conference_Location
Austin, TX
ISSN
1063-6404
Print_ISBN
0-7695-0801-4
Type
conf
DOI
10.1109/ICCD.2000.878290
Filename
878290
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