Skewed CMOS: Noise-immune high-performance low-power static circuit family

In this paper, we present a noise-immune high-performance static circuit family suitable for low-voltage operation called skewed logic. Skewed logic circuits, in comparison with Domino logic, have better scalability, and they are more suitable for low voltage applications because of better noise margin. Skewed logic has been compared with Domino logic in terms of delay, power, and dynamic noise immunity. A design methodology for skewed CMOS pipelined circuits has been developed. Comparisons between skewed and Domino circuits on a 0.25 μm 700 MHz 16×16 bits pipelined multiplier show superior properties of skewed circuits over Domino in terms of clock power dissipation and peak current consumption