DocumentCode
2550398
Title
Model-based analysis of timed-triggered ethernet
Author
Dutertre, Bruno ; Easwaran, Arvind ; Hall, B. ; Steiner, Wilfried
fYear
2012
fDate
14-18 Oct. 2012
Firstpage
1
Lastpage
25
Abstract
Presents a collection of slides covering the following topics: model-based analysis; time-triggered Ethernet; formal tool; model checking; protocol; design phase; automated test generation; and SAT solver.
Keywords
computability; formal verification; local area networks; protocols; SAT solver; automated test generation; design phase; formal tool; model checking; model-based analysis; protocol; timed-triggered Ethernet;
fLanguage
English
Publisher
ieee
Conference_Titel
Digital Avionics Systems Conference (DASC), 2012 IEEE/AIAA 31st
Conference_Location
Williamsburg, VA
ISSN
2155-7195
Print_ISBN
978-1-4673-1699-6
Type
conf
DOI
10.1109/DASC.2012.6383129
Filename
6383129
Link To Document