DocumentCode :
2550461
Title :
AMULET3: a 100 MIPS asynchronous embedded processor
Author :
Furber, S.B. ; Edwards, D.A. ; Garside, J.D.
Author_Institution :
Dept. of Comput. Sci., Manchester Univ., UK
fYear :
2000
fDate :
2000
Firstpage :
329
Lastpage :
334
Abstract :
AMULET3 is a 32-bit asynchronous processor core that is fully instruction set compatible with the clocked ARM cores. It represents the culmination of ten years of research and development into asynchronous processor design at the University of Manchester, and is the first step into commercial use for this technology. AMULET3 shows that asynchronous technology is commercially viable, and is competitive in terms of performance, area and power-efficiency with clocked design. In addition, asynchronous design offers significant advantages in terms of reduced electromagnetic interference and unique power management capabilities
Keywords :
electromagnetic interference; embedded systems; instruction sets; microprocessor chips; 100 MIPS asynchronous embedded processor; 32-bit asynchronous processor core; AMULET3; asynchronous processor design; clocked ARM cores; clocked design; electromagnetic interference; instruction set compatible; unique power management; Circuit testing; Clocks; Communication system control; Computer science; Energy management; ISDN; Pulse width modulation converters; Radio control; Silicon; Telecommunication control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design, 2000. Proceedings. 2000 International Conference on
Conference_Location :
Austin, TX
ISSN :
1063-6404
Print_ISBN :
0-7695-0801-4
Type :
conf
DOI :
10.1109/ICCD.2000.878304
Filename :
878304
Link To Document :
بازگشت