• DocumentCode
    2551121
  • Title

    On integrating a proprietary and a commercial architecture for optimal BIST performances in SoCs

  • Author

    Benso, A. ; Di Carlo, S. ; Chiusano, S. ; Prinetto, P. ; Ricciato, F. ; Bodoni, M. Lobetti ; Spadari, M.

  • Author_Institution
    Dipartimento di Autom. e Inf., Politecnico di Torino, Italy
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    539
  • Lastpage
    540
  • Abstract
    This paper presents the integration of a proprietary hierarchical and distributed test access mechanism called HD2BIST and a BIST insertion commercial tool. The paper briefly describes the architecture and the features of both the environments and it presents some experimental results obtained on an industrial SoC
  • Keywords
    built-in self test; logic testing; BIST insertion commercial tool; HD2BIST; SoCs; commercial architecture; distributed test access mechanism; optimal BIST performances; proprietary integration; Access protocols; Built-in self-test; Circuits; Control systems; Intelligent networks; Job shop scheduling; Life testing; Logic testing; Performance evaluation; System testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design, 2000. Proceedings. 2000 International Conference on
  • Conference_Location
    Austin, TX
  • ISSN
    1063-6404
  • Print_ISBN
    0-7695-0801-4
  • Type

    conf

  • DOI
    10.1109/ICCD.2000.878335
  • Filename
    878335
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2551121