CMOS design of a multibit bandpass continuous-time sigma delta modulator running at 1.2 GHz

Author

Benabid, Sorore ; Aghdam, Esmaeil Najafi ; Benabes, Philippe ; Guessab, Sylvie ; Kielbasa, Richard

Author_Institution

Dept. of Meas., Ecole Superieure d´´EIectricite, Gif sur Yvette, France

Volume

1

fYear

2004

fDate

3-5 Nov. 2004

Firstpage

51

Lastpage

55

Abstract

This paper presents the design technique for a high speed sixth order bandpass continuous-time sigma-delta modulator in a standard 0.35μm CMOS technology. Three resonators are implemented in a parallel structure using highly linear operational transconductance amplifiers (OTA). Furthermore, an improved method employing two 3-bit flash converters as a loop quantizer allows doubling the sampling frequency. As a consequence we can design a modulator clocked at 1.2GHz allowing the integration of passive LC-filters in this standard technology. Transistor level simulations show that the modulator can achieve a signal-to-noise and distortion-ratio (SNDR) of 98dD over a 2MHz signal band at 300MHz central frequency.

Keywords

CMOS integrated circuits; UHF integrated circuits; continuous time systems; integrated circuit design; operational amplifiers; sigma-delta modulation; 0.35 micron; 1.2 GHz; 2 MHz; 300 MHz; CMOS design; bandpass continuous-time modulator; flash converters; loop quantizer; multibit modulator; operational transconductance amplifiers; passive LC-filters; sampling frequency; sigma delta modulator; signal-to-noise and distortion-ratio; transistor level simulations; Active filters; Band pass filters; CMOS technology; Clocks; Delay; Delta modulation; Delta-sigma modulation; Distortion; Frequency; Sampling methods;

fLanguage

English

Publisher

ieee

Conference_Titel

Devices, Circuits and Systems, 2004. Proceedings of the Fifth IEEE International Caracas Conference on

Print_ISBN

0-7803-8777-5

Type

conf

DOI

10.1109/ICCDCS.2004.1393352

Filename

1393352