DocumentCode :
2551743
Title :
Efficient rate adjustment hardware for on-chip learning
Author :
Rezaie, M. Ghannad ; Farbiz, F. ; Behnam, A.
Author_Institution :
Dept. of Electr. Eng., Tehran Univ., Iran
Volume :
1
fYear :
2004
fDate :
3-5 Nov. 2004
Firstpage :
98
Lastpage :
102
Abstract :
This paper presents a new approach to facilitate the implementation of adaptive adjustment of on-chip rate learning in feed forward neural networks. A typical multi layer perceptron (MLP) network with controlled learning method is assumed as the target of the design and a Gilbert amplifier cell is used to tune an adaptive learning rate to find an optimum trajectory for robust design.
Keywords :
VLSI; backpropagation; feedforward neural nets; multilayer perceptrons; Gilbert amplifier cell; VLSI fabrication; adaptive learning rate; adaptive rate; back propagation; controlled learning method; feedforward neural networks; multilayer perceptron network; on-chip rate learning; rate adjustment hardware; weight perturbation; Adaptive control; Feedforward neural networks; Feeds; Hardware; Learning systems; Network-on-a-chip; Neural networks; Programmable control; Robust control; Trajectory;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Devices, Circuits and Systems, 2004. Proceedings of the Fifth IEEE International Caracas Conference on
Print_ISBN :
0-7803-8777-5
Type :
conf
DOI :
10.1109/ICCDCS.2004.1393362
Filename :
1393362
Link To Document :
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