Title :
On-resistance and harmonic distortion in graded-channel SOI FD MOSFET
Author :
Cerdeira, A. ; Alemán, M.A. ; Pavanello, M.A. ; Martino, J.A. ; Vancaillie, L. ; Flandre
Author_Institution :
SEES, CINVESTAV, Mexico, Mexico
Abstract :
In this paper we analyze the advantages of asymmetric channel engineering on the MOS resistance behavior in quasi-linear operation, such as used in integrated continuous-time-tunable filters. The study of the two major figures of merit in such applications, i.e. on-resistance and non-linear harmonic distortion, is supported by measurements on conventional and graded-channel (GC) fully depleted (FD) SOI MOSFETs. The quasi linear I-V characteristics of GC transistors demonstrate a decrease of the on-resistance as the length of the low doped region into the channel is augmented and an improvement of the third order harmonic distortion (HD3), when compared with conventional transistors. A full comparison method between conventional and GC SOI MOSFETs is presented considering HD3 evolution with on-resistance tuning under low voltage of operation, demonstrating the significant advantages of the asymmetrical long channel transistors.
Keywords :
MOSFET; continuous time filters; harmonic distortion; silicon-on-insulator; MOS resistance behavior; asymmetric channel engineering; asymmetrical long channel transistors; graded-channel SOI FD MOSFET; harmonic distortion; integrated continuous-time-tunable filters; low voltage operation; on resistance tuning; quasilinear operation; Circuit optimization; Distortion measurement; Filters; Frequency; Harmonic distortion; High definition video; MOSFET circuits; Performance analysis; Resistors; Tunable circuits and devices;
Conference_Titel :
Devices, Circuits and Systems, 2004. Proceedings of the Fifth IEEE International Caracas Conference on
Print_ISBN :
0-7803-8777-5
DOI :
10.1109/ICCDCS.2004.1393365