Development of a single photon avalanche diode (SPAD) array in high voltage CMOS 0.8 µm dedicated to a 3D integrated circuit (3DIC)

We present the realization of Single Photon Avalanche Diode (SPA D) arrays for Positron Emission Tomography (PET). These SPAD arrays are designed in Teledyne BALSA High Voltage (HV) CMOS technology targeted for a 3 dimensional (3D) heterogeneous integration with deep-submicron CMOS readout electronics to realize a 3D Single Photon Counting Module (3DSPCM). We are developing a post-process Through Silicon Vias (TSV) technology at Universite de Sherbrooke to implement the 3D heterogeneous bonding. The 3D integration of SPAD and electronics reduces the SPAD interconnect parasitic capacitance, greatly increases the photosensitive area and improves overall performances. Also, SPAD are known for their excellent timing performance which enables Time of Flight capabilities in PET, significantly improving image contrast and spatial resolution. For this purpose, we designed, fabricated and characterized SPAD arrays with active quenching circuit using the HV CMOS 0.8 μm technology. The chosen structure is a p+ anode in an n-well using a p-well isolation layer to achieve 54 % of fill factor and takes full advantage of the 3D integration scheme. SPAD evaluation results show a Photodetection Efficiency (PDE) up to 49 % at 480 nm, Dark Count Rate (DCR) of 50 kcps, afterpulsing probability <;2 %, crosstalk probability <;1 %, and timing jitter of 100 ps at room temperature.