Effects of the low temperature annealing on the transport mechanisms in n-type a-SiGe:H/p-type c-silicon heterojunctions

n-type a-SiGe:H on p-type c-silicon heterojunctions were fabricated and electrically characterized. The transport mechanisms were determined by analyzing the temperature dependence of the current-voltage characteristics in two different wafers, with and without thermal annealing at 150°C. At low forward bias (V > 0.5 V), we found that the transport mechanisms are determined by the c-Si in both wafers. The ideality factors were 1.10 and 1.47 for the wafers, with and without low thermal annealing, respectively. At high forward bias (V < 0.5 V), the space charge limited effect became the dominant transport mechanism in all the measured devices. Under reverse bias conditions, the J-V curves showed that the current density is dominated by the carrier generation.