• DocumentCode
    2553084
  • Title

    Power-balanced reconfigurable floating-gate-MOS logic circuit for tamper resistant VLSI

  • Author

    Tongprasit, Benjamas ; Shibata, Tadashi

  • Author_Institution
    Dept. of Frontier Informatics, Tokyo Univ.
  • fYear
    2006
  • fDate
    21-24 May 2006
  • Lastpage
    4858
  • Abstract
    Design and experimental evaluation of power-balanced reconfigurable floating-gate-MOS logic circuit is presented. The circuit can represent all 512 symmetric Boolean functions for eight inputs and 256 Boolean functions for three-input symmetric/asymmetric functions. The programming of function is done by control signals. Namely, no change in hardware configuration is required. The proposed circuit employs a highly symmetric architecture. The input data and the control signals are broadcasted in pairs with their complementary values. As a result, the power consumption of the circuit is independent of the input data and the logic function. Hence, the proposed circuit is resistant to the power analysis attack
  • Keywords
    Boolean functions; MOS logic circuits; VLSI; integrated circuit design; logic design; Boolean functions; VLSI; logic function; power analysis attack; reconfigurable floating-gate-MOS logic circuit; symmetric architecture; Application specific integrated circuits; Boolean functions; CMOS technology; Energy consumption; Functional programming; Hardware; Informatics; Logic circuits; Reconfigurable logic; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
  • Conference_Location
    Island of Kos
  • Print_ISBN
    0-7803-9389-9
  • Type

    conf

  • DOI
    10.1109/ISCAS.2006.1693718
  • Filename
    1693718