DocumentCode :
2553441
Title :
COST: Circuit Optimization SysTem in ASIC library development environment
Author :
Raghu, C.S. ; Bhowmik, Suravi ; Ramani, Poorvaja ; Sundaram, S.
Author_Institution :
ASIC Div., Texas Instrum. (India) Ltd., Bangalore, India
fYear :
1999
fDate :
7-10 Jan 1999
Firstpage :
460
Lastpage :
463
Abstract :
Increased focus on high performance circuit design and shorter development cycle time for ASIC libraries, are driving the need for automatic circuit optimizers in the ASIC library development environment. High performance input/output circuits are the key differentiator cells in the ASIC library market. Automating the design process of these circuits using an optimizer, not only ensures high performance cells but also provides faster design cycle. COST has been used to optimize cells in the development of many ASIC libraries. In this paper we have described the essential components of the COST optimization system and presented a method for optimizing I/O circuits. We have compared the performance of the two cost function heuristics implemented in our optimization system on ASIC input/output circuits
Keywords :
application specific integrated circuits; circuit CAD; circuit optimisation; engineering graphics; graphical user interfaces; integrated circuit design; ASIC input/output circuits; ASIC library development environment; COST; I/O circuits; automatic circuit optimization; circuit optimization system; cost function heuristics; differentiator cells; high performance input/output circuits; Application specific integrated circuits; Circuit optimization; Circuit simulation; Computational modeling; Cost function; Design optimization; Engines; Libraries; SPICE; Tuned circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 1999. Proceedings. Twelfth International Conference On
Conference_Location :
Goa
ISSN :
1063-9667
Print_ISBN :
0-7695-0013-7
Type :
conf
DOI :
10.1109/ICVD.1999.745198
Filename :
745198
Link To Document :
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