Title :
Single-chip FPGA architecture for 3D IIR broadband spatio-temporal beam plane-wave filters
Author :
Madanayake, H. L P Arjuna ; Bruton, Len T.
Author_Institution :
Calgary Univ., Alta.
Abstract :
A highly-directional FPGA-based broadband beam former is proposed using a novel 3D IIR plane-wave digital filter. This filter acquires the 3D spatio-temporal input signals from spatially-rectangular arrays of sensors that are scanned by only one time-multiplexed A/D converter. The proposed architecture employs a novel scanned-array 3D parallel vector-processor (VP), clocked at 80 MHz, and has the potential to achieve real-time broadband plane-wave filtering on a single low-cost integrated circuit at spatial frame-rates of 19 kHz over a 64 by 64 spatial broadband sensor array
Keywords :
IIR filters; analogue-digital conversion; array signal processing; field programmable gate arrays; multidimensional digital filters; spatiotemporal phenomena; vector processor systems; 19 kHz; 3D digital filter; 3D parallel vector-processor; 3D spatio-temporal input signals; 80 MHz; FPGA-based beam former; IIR digital filter; broadband beam former; broadband filter; broadband filtering; plane-wave digital filter; plane-wave filtering; real-time filtering; scanned-array vector-processor; single low-cost integrated circuit; single-chip FPGA architecture; spatial broadband sensor array; time-multiplexed A/D converter; Array signal processing; Circuits; Digital filters; Field programmable gate arrays; Finite impulse response filter; Hardware; IIR filters; Prototypes; Sensor arrays; Very large scale integration;
Conference_Titel :
Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on
Conference_Location :
Island of Kos
Print_ISBN :
0-7803-9389-9
DOI :
10.1109/ISCAS.2006.1693736
