DocumentCode
2553779
Title
Sequential chaotic annealing and its application to multilayer channel routing
Author
Jayadeva
Author_Institution
Dept. of Electr. Eng., Indian Inst. of Technol., New Delhi, India
fYear
1999
fDate
7-10 Jan 1999
Firstpage
570
Lastpage
573
Abstract
Recent developments have aroused the interest of researchers in the application of chaotic neural networks to combinatorial optimization problems. In this paper, we introduce a new approach, which is termed Sequential Chaotic Annealing. The approach combines chaotic neural networks and ideas from the theory of nonlinear optimization. The proposed neural networks are adaptive in the sense that the network “learns” the right cost or energy function to optimize. Sequential Chaotic Annealing is applied to multilayer channel routing using the reserved wiring model and restricted doglegging. We show that the proposed approach improves convergence to valid solutions and reduces the sensitivity to the initial states of the neurons
Keywords
VLSI; chaos; circuit layout CAD; circuit optimisation; integrated circuit layout; network routing; neural nets; simulated annealing; wiring; VLSI; chaotic neural networks; combinatorial optimization problems; energy function; multilayer channel routing; nonlinear optimization; reserved wiring model; restricted doglegging; sequential chaotic annealing; Adaptive systems; Annealing; Chaos; Cost function; Multi-layer neural network; Neural networks; Neurons; Nonhomogeneous media; Routing; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 1999. Proceedings. Twelfth International Conference On
Conference_Location
Goa
ISSN
1063-9667
Print_ISBN
0-7695-0013-7
Type
conf
DOI
10.1109/ICVD.1999.745215
Filename
745215
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