DocumentCode :
2554937
Title :
Improving the diagnosability of digital circuits
Author :
Ravikumar, C.P. ; Sharma, Manish ; Patney, R.K.
Author_Institution :
Dept. of Electr. Eng., Indian Inst. of Technol., New Delhi, India
fYear :
1999
fDate :
7-10 Jan 1999
Firstpage :
629
Lastpage :
634
Abstract :
Testing and fault diagnosis of core-based systems are both difficult problems. Being able to identify which module in the core-based system is faulty has become very important. In this paper, we present algorithms to introduce test points for improving the diagnosability of a digital system. We define a measure of diagnosability known as module resolution which relates to the number of circuit modules that are suspected to be faulty after the diagnostic test procedure has been completed. We present a technique to partition the system into subsystems such that they can be tested in isolation. We also concurrently arrive at a test schedule which minimizes the overall effort in diagnostic testing. We have developed a tool called DEBIT for identifying the number, type, and location of test points in the circuit. We report the results of applying the tool on several benchmark circuits
Keywords :
VLSI; fault diagnosis; integrated circuit testing; logic partitioning; logic testing; DEBIT; benchmark circuits; circuit modules; core-based systems; diagnosability; digital circuits; fault diagnosis; module resolution; subsystem partitioning; test points; test schedule; Circuit faults; Circuit testing; Digital circuits; Digital systems; Fault diagnosis; Manufacturing processes; Multiplexing; Partitioning algorithms; System testing; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 1999. Proceedings. Twelfth International Conference On
Conference_Location :
Goa
ISSN :
1063-9667
Print_ISBN :
0-7695-0013-7
Type :
conf
DOI :
10.1109/ICVD.1999.745276
Filename :
745276
Link To Document :
بازگشت